Dynamic placement of network stack components on multiple cores
Our fast network stack uses multiple cores dedicated to run its individual components. Although this is important for peak performance it prohibits other parts of the system to use the cores under different workloads and is resource and energy inefficient. We want to allow the stack to dynamically change how many cores and what kind it uses depending on the current load of the system to deliver the required performance. It is indeed possible to run all of the components on a single core, however, this has a significant performance impact (mainly on TCP) since the scheduler does not know in what order to run the components is the best so it not acceptable to place the components blindly.
We envision that future multicore architecture will be heterogeneous. We expect that the cores will feature the same instruction set (ISA), or have overlapping ISA (large subset of ISA will be shared by all cores, e.g., i386 set but not MMX, SSE, etc.) and will have different runtime characteristics. We can emulate this using voltage and frequency scaling. Hyperthreaded processors is an example since we can let processes to use it (and compete for the physical core) or not.
The goal of the project is to let the system to find good placement based on profiling the load and the usage of the physical resources.
It is possible to split the work into an IPA to implement frequency and voltage scaling and a thesis topic to find a solution to a subset of the problems described above.